1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, especially, a method for manufacturing a semiconductor device in which exposure conditions can be assessed by forming a predetermined assessment pattern on a principal surface of a semiconductor wafer.
In a photolithography process of manufacturing a semiconductor device, a resist pattern is formed by printing a circuit pattern, which is formed on a photo mask, on a semiconductor wafer with a reduced projection exposure device or a scanning reduced projection exposure device (hereinafter called an exposure device), after a photopolymer resin, a so called photoresist, is applied.
Recently, creating a high-quality resist pattern formed with photolithography has been an important issue, as large-scale integration and miniaturization of semiconductor devices are advanced. Quality of a resist pattern is normally assessed by its finished dimensions, especially its shape and its bottom dimensions. In order to form a good resist pattern, stabilization of the exposure conditions, that is, stabilization of the amount of exposure and focal position is essential. Therefore, a quantitative assessment of variations in the exposure conditions is required.
In a normal photolithography process, an exposure treatment is conducted for a product wafer in exposure conditions which were preliminarily assessed and set as optimal, so that the desired objective dimensions can be formed. However, the finished dimensions of a pattern is influenced by device variations or environmental variations when conducting an exposure treatment, such as the instability of the device itself and variations in the temperature or humidity surrounding a device. Therefore, all the patterns cannot be necessarily formed in the desired objective dimensions, even if the exposure conditions thought to be optimal are used. Because of this, at the start of manufacturing actual product wafers, single or plural wafer(s) may be processed in exposure conditions in advance and the conditions can be assessed before all the wafers of the product lot are processed. A predetermined exposure condition assessment pattern is used in order to check variation in these exposure conditions. The exposure condition assessment pattern is formed on every chip and it is independent from the circuit pattern of the primary integrated circuit on a chip. Variation in these exposure conditions is checked by measuring the dimensions of the exposure conditions assessment pattern of a wafer in advance that is processed in the exposure conditions that are thought to be optimal, and then by checking the difference between the actual dimensions of the pattern and its objective dimensions. If the difference is large, the amount of exposure and focal position need to be changed. Generally speaking, the relationship between the amount of exposure and the dimensions of a pattern shows linearity. Therefore, if the difference between the actual measured dimensions and the objective dimensions can be obtained, the amount of exposure that should be changed can be calculated. However, the relationship between the focal position and the dimensions of a pattern is generally represented by a substantially quadratic curve with an extremum at the optimal focal position. Therefore, two focal positions corresponding to specific pattern dimensions are detected, and thus it is impossible to judge whether a focal position has deviated to a positive dimensions or a negative size. Because of this, adjustment of the pattern dimensions is normally conducted only by changing the amount of exposure.
2. Background Information
For example, inventions of a manufacturing method of a semiconductor device in which assessment and adjustment of the exposure conditions are conducted are described in Japan Patent Publications JP-A-8-264409 (especially pages 7 and 8, and FIG. 1), JP-A-2003-168641 (especially pages 4-8, FIGS. 1, 2, and 6), and JP-A-2004-103674 (especially pages 9-20, FIG. 31).
In Japan Patent Publication JP-A-8-264409, a pair of removed patterns and a pair of remaining patterns whose corners face each other are formed on and under a step in a semiconductor wafer, respectively. Distance HA of a corner of a remaining pattern formed on a step, distance HB of a corner of a removed pattern, distance LA of a corner of a remaining pattern formed under a step, and distance LB of a corner of a removed pattern are measured, and the amount of exposure is assessed according to the value of HA+LA−HB−LB. Also, the focal position is assessed according to the value of HA+HB−LA−LB. Whether the amount of exposure and focal position in an exposure treatment of a semiconductor wafer is optimal or not is quantitatively assessed through these assessments.
In Japan Patent Publication JP-A-2003-168641, the exposure conditions are assessed with three exposure conditions assessment patterns. The first pattern is in a circular shape. The second pattern has the same shape and dimensions with the first pattern, but the height of the formed position is different from the first pattern. The third pattern has the same shape with the first pattern, but its dimensions and the height of the formed position are different from the first pattern. The dimensions of the first and the second patterns are set so that they are not influenced by the assumed difference in the focal position in an exposure process, and the dimensions of the third pattern is set so that it is influenced by the assumed difference of the focal position in an exposure process. Also, the amount of exposure and the focal position in the next exposure treatment is properly adjusted by preparing data in advance that indicates the relationship between the dimensions in forming each of the first to third patterns and the amount of exposure, and data that indicates the relationship between the dimensions and focal position, and then by estimating the variation in the amount of exposure, variation in focal position, and the varied direction of the focal point, with those prepared data and measured dimensions data of the first to third patterns formed in an actual manufacturing process.
In Japan Patent Publication JP-A-2004-103674, a method of adjusting the exposure conditions with a response surface method (RSM), which is a general statistical method, is described. First, in consideration of factors influencing the dimensions of a printed pattern, such as focus, amount of an exposure, mask pattern shape, and the differences in exposure devices including aberration, the response pattern dependence of the exposure conditions such as the best focus shift is assessed. Next, a response model including the differences in the pattern and the aberration of the device is created, and the availability and performance of the estimation of the exposure conditions with plural response models are assessed. Then, if a favorable assessment cannot be obtained from the results of the assessment, optimization in consideration of a control, such as a selection of a pattern, is conducted in setting the conditions. On the other hand, if a favorable assessment is obtained from the results of the assessment, device dimensions examination data is used for controlling feedback. Next, the exposure conditions at the start of manufacturing a device with each response model are estimated from the results of an examination of a plurality of actual device dimensions, and variation in the exposure conditions at the start of manufacturing a device is corrected with the estimation.
When the adjustment of the dimensions is conducted only by changing the amount of exposure, the difference in dimensions which originate from variation in focal position, is also dealt with by changing the amount of exposure. Therefore, there is a possibility that a negative impact will be encouraged by means of variation in focal position. In other words, variation in focal position not only influences an increase and decrease of pattern dimensions, but also makes variations in pattern dimensions sensitive toward variation in the amount of exposure. Thus, a method is required which can properly assess and adjust not only variation in the amount of exposure but also variation in the focal position.
The invention described in Japan Patent Publication JP-A-08-264409 is a method of assessing and adjusting variation in the amount of exposure and the focal position. However, a remaining pattern and a removed pattern need to be formed on and under a step, respectively. Therefore, there is a possibility that the area occupied by the exposure conditions assessment pattern will become large.
The invention described in Japan Patent Publication JP-A-2003-168641 is a method of assessing and adjusting variation in the amount of exposure and the focal position. However, there is a restriction in the dimensions of the exposure conditions assessment pattern. In other words, the dimensions of the first and second patterns need to be set so that they are not influenced by differences in focal position. Also, the dimensions of the third pattern are set so that it is influenced by differences in focal position. In general, the exposure conditions assessment pattern is desired to be formed in a small size to detect subtle variations in the exposure conditions. However, the first and second patterns of the invention need to be formed in a size such that they are not influenced by differences in focal point (e.g., 0.5 μm). If the first and second patterns are formed in a smaller size compared to that size, focal depth gets smaller, and it is expected that the first and second patterns tend to be easily influenced by differences in focal position.
In Japan Patent Publication JP-A-2004-103674, a method of assessing and adjusting variation in the amount of exposure and focal position is described. However, assessment and correction of the exposure conditions are conducted with a statistical method, RSM. Therefore, it can be seen that a complicated analysis method is required and the method cannot be easily put into operation.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved method for manufacturing a semiconductor device. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.